Semiconductor device



1966 TETSURO NAKAMURA 3,288,656

SEMICONDUCTOR DEVICE Original Filed July 5. 1962 FIG. 18

FIG. 1A

FIG. 3B

INVENTOR TETSURO NAKAMURA BY p.

ATTOR N EYJ United States Patent 2 Claims. (ci. 148-335) This invention relates to a semiconductor device and more particularly to a plurality of semiconductor elements. This application is a division of my copending application Serial No. 207,242, filed July 3, 1962, now Patent No. 3,239,908.

In the field of solid state electronics, it is highly desirable to have a number of semiconductor elements of the form of a compound unitary structure. It is, however, extremely difiicult and impractical to produce such a structure due to the nature of the manufacturing process by which semiconductors are made. Organic binding agents have been employed to form a plurality of elements into a unitary structure, however, it has been found that the use of such agents produce various deleterious effects. Among these are distortion and cracking due to the difference in thermal expansion between the element and the binding compound, deterioration of the characteristics of the individual semiconductor elements, and poor reliability resulting from evaporation from the binding agent.

Accordingly, it is an object of this invention to provide a unitary structure comprising a plurality of individual semiconductor elements which eliminate the above disadvantages.

One of the advantages of the invention is that each individual semiconductive element of the structure is subjected to the same atmospheric and thermal conditions and therefore any changes resulting from these factors will be more uniform from element to element.

These and other objects, features and advantages of the invention will be best understood from the following description, taken in conjunction with the claims and the drawings, in which:

FIGURES 1a and 1b and FIGURES 2a and 2b show embodiments of the invention in which two transistors are formed in a unitary structure with their common surfaces vertically and obliquely arranged, and

FIGURE 3 is another embodiment in which a diode and a transistor are formed into a unitary structure.

In accordance with the invention, a plurality of semiconductive crystals or elements, individually made, are formed into a unitary structure through the medium of an insulating layer made between them. This layer is formed by a growing process of oxidation as the elements to be secured together are positioned adjacent one another in a controlled atmosphere.

Referring now to FIGURES la and 1b, there is shown a pup type mesa transistor designated by the numeral 10, and an npn type mesa transistor, designated by the numeral 12. These two transistor crystals or elements are formed into a unitary structure, as shown in FIG. 1, wherein a side of one element is held in contact with a side of the other element, by means of a layer 14 which is an oxide of the material comprising the transistor elements, in this case silicon oxide. The numerals 16 and 16 designate emitter regions, numerals 17 and 17' designate base regions and numerals 18 and 18 designate collector regions of the two transistors.

The transistors and 12 may be formed into a unitary structure by positioning them adjacent one another and subjecting them to a temperature of approximately 650 C. for approximately one hour in an atmosphere of oxygen which has been saturated with steam or water vapor at C. This produces the growth or formation of an insulating silicon oxide layer on all external surfaces of elements 10 and 12 and also forms the oxide binding layer 14, which causes the crystals 10 and 12 to adhere to each other, thus producing a unitary structure. I have found that this process does not adversely affect the characteristics or the position of the pn junction layer in the elements 10 and 12. Further, in the unitary structure produced, each element is capable of stable performance without interaction on the other element. Additionally, difliculties experienced in the prior art due to thermal expansion are eliminated since the oxide layer is formed from the element itself and has substantially the same thermal coefiicient of expansion as the element.

Another method of producing the oxide binding layer 14 is to subject the elements to a temperature of approximately 1,0001,200 C. in an atmosphere of oxygen for a period of approximately one hour, the oxygen first having been saturated with steam or water vapor at 80. In this case, however, the position of the pn junction may shift somewhat by reason of diffusion of active impurities because of the high heating temperature.

In the two methods of forming the common layer 14 described above, we have cited as examples treatment in an atmosphere of oxygen and saturated steam, however, it is also possible to produce satisfactory results without the use of steam.

FIGURES 2a and 2b show the form or shape generally employed for the elements, these being shown as 20 and 22, corresponding to the elements 10 and 12 in FIGURE 1, and bound together by the oxide layer 24.

FIGURE 3 illustrates a diode semiconductor element 30 secured to a surface of a transistor element 32 by means of a horizontal oxide binding layer 34. The numeral 36 indicates a pn junction layer of the diode.

By the use of the methods described above, a compact unitary structure is achieved which comprises a plurality of semiconductor elements held together by means of an oxide binding layer formed from portions of the elements in contact with one another.

Though the drawings and the explanation have referred to mesa-type elements, the invention is obviously applicable also to semiconductive elements of various types. Further, it is understood that the description is made only by way of example and is not to be deemed a limitation of the scope of the invention as set forth in the objects thereof and in the accompanying claims. I

What is claimed is:

1. A unitary structurecomprising a transistor having an emitter region, a base region and a collector region and a diode having a cathode region and an anode region,

said collector region and a selected one of said cathode and anode regions each having silicon on'at least one surface thereof,

said silicon surfaces being in adjoining relationship,

said surfaces being permanently bonded together by an insulating layer,

said insulating layer comprising silicon oxide,

and said silicon oxide being formed from silicon from each of said surfaces and having a temperature coefiicient of expansion substantially the same as the silicon of said surfaces, whereby internal stresses and cracking of said unitary structure is eliminated. 2. A unitary structure comprising a plurality of transistors each having emitter, base and collector regions, said collector regions including silicon,

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said transistors being permanently joined together at their collector regions by a bonding layer formed from silicon from said collector regions,

said layer comprising silicon oxide and having a temperature coeificient of expansion substantially the same as said collector regions, whereby internal stresses and cracking of said transistors is eliminated.

References Cited by the Examiner UNITED STATES PATENTS 12/1962 Hunter 148-335 X 1/1964 Noyce 317-235 2/1964 Im 148-335 X 9/1964 Noyce 148-33 X 11/1964 Last 317-101 8/1965 Brarnley et a1. 317-234 OTHER REFERENCES Electronics, vol. 36, July 19, 1963, pages 47-52.

DAVID L. RECK, Primary Examiner. C..N. LOVELL, Assistant Examiner. 

2. A UNITARY STRUCTURE COMPRISING A PLURALITY OF TRANSISTORS EACH HAVING EMITTER, BASE AND COLLECTOR REGIONS, SAID COLLECTOR REGIONS INCLUDING SILICON, SAID TRANSISTORS BEING PERMANENTLY JOINED TOGETHER AT THEIR COLLECTOR REGIONS BY A BONDING LAYER FORMED FROM SILICON FROM SAID COLLECTOR REGIONS, SAID LAYER COMPRISING SILICON OXIDE AND HAVING A TEMPERATURE COEFFICIENT OF EXPANSION SUBSTANTIALLY THE SAME AS SAID COLLECTOR REGIONS, WHEREBY INTERNAL STRESSES AND CRACKING OF SAID TRANSISTORS IS ELIMINATED. 